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Single-Chip FaxEngine Product Family
Single-Chip FaxEngine (CXD9450) and Integrated Analog Device (CX20415)
The ConexantTM Single-Chip FaxEngine product family consists of the Single-Chip FaxEngine (CXD9450) that contains an embedded modem Digital Signal Processor (DSP), and a separate Integrated Analog (IA) device (20415). This device set, along with the supporting firmware and evaluation system, comprises a complete facsimile machine--needing only power supply, scanner, and printer mechanism components to complete the machine. A system-level block diagram is shown in Figure 1.
Features
Microprocessor and Bus Interface
* MC24 Central Processing Unit - Up to 10 MHz CPU clock speed - Memory efficient input/output bit manipulation - 24-bit internal address bus, 8-bit data bus * External Bus - Address, data, control, status, and decoded chip select signals support connection to external ROM, SRAM, DRAM and operator panel - 24-bit external address bus - 8-bit data bus * Chip selects - ROMCSn for ROM support - CS0n for SRAM - CS1n-CS5n for external I/O - FCSn for FLASH memory support - LCDCS for LCD support * DRAM Controller - DRAM is refreshed in Sleep and Stand-by modes - Up to 8 MB supported in two blocks - Organizations supported: 4 or 8-bit - Single and page mode access support * Flash memory support - NAND and NOR-type support - Serial NAND support - NOR-type memory up to 2 MB * DMA Controller - Six dedicated internal DMA channels for scanner, thermal printer, and T.4/T.6 access of internal and/or external memory. - DMA Channel 2 can be reprogrammed for external access to plain paper inkjet printing
Integrated Controller
The integrated controller (SCC) provides the majority of the electronics necessary to build a thermal or thermal transfer facsimile machine integrated into a one-chip solution. The controller performs primary facsimile control/monitoring and compression/decompression functions, and interfaces with fax machine components such as a scanner, printer, motor, and operator control panel. The MC24 embedded processor provides an external 16-MB direct memory access capability. An integrated Pipeline ADC, combined with Conexant's Image Processing Scheme, provides state of the art image processing performance on text and gray scale images.
Embedded Modem DSP
The embedded modem DSP supports V.29 and V.27 ter facsimile transmission and reception, in addition to all basic HDLC functions and T.30 requirements. The modem allows all line connections and single or dual tone generation and detection. Optional features such as V.17, voice compression/decompression for Digital Telephone Answering Machine (DTAM), and duplex speakerphone are also available. Figure 1. Single-Chip FaxEngine System Level Block Diagram
Local Handset Telephone Line Speaker Phone DAA Line IA
Single-Chip FaxEngine (CXD9450)
CCD or CIS Scanner Thermal Printer or Thermal Transfer Plain Paper Inkjet Printer (Optional)
DSP
Secondary Line IA Operator Panel
SCC
24 NOR FLASH 2 MB 20 Control Bus Data Bus Address Bus 8 24 DRAM 8 MB 11 SRAM 1 MB 20 8 ROM 2 MB 20
Data Sheet
Conexant
Doc. No. 100544C
September 8, 2000
Single-Chip FaxEngine Product Family
Single-Chip FaxEngine and Integrated Analog Device
Single-Chip FaxEngine Family Characteristics and Ordering Information
Device Set Number
DSFE-L400-011 DSFE-L400-001 DSFE-L400-021 DSFE-L410-001 DSFE-L410-011 DSFE-L410-021
Description
9600 Single-Chip FaxEngine 9600 Single-Chip FaxEngine with DTAM 9600 Single-Chip FaxEngine with DTAM and Speakerphone Support 14400 Single-Chip FaxEngine 14400 Single-Chip FaxEngine with DTAM 14400 Single-Chip FaxEngine with DTAM and Speakerphone Support
Marketing Abbreviation
SCE109 SCE109-V SCE109-VS SCE114 SCE114-V SCE114-VS
Single-Chip FaxEngine CXD9450-25 CXD9450-24 CXD9450-23 CXD9450-15 CXD9450-14
CXD9450-13
Integrated Analog Device
20415-11 (one) 20415-11 (one) 20415-11 (two) 20415-11 (one) 20415-11 (one) 20415-11 (two)
Full-Duplex Speakerphone
No No Yes No No Yes
DTAM Support
No Yes Yes No Yes Yes
Revision History
Revision
222DS (100544A) 100544B 100544C
Date
08/12/99 03/31/00 09/08/00 Initial limited release of document
Comments
Update Current and Power Requirements table, reformat, new product name, add order info CXD9450 to CXD9450 name change.
(c) 1999, 2000, Conexant Systems, Inc. All Rights Reserved.
Information in this document is provided in connection with Conexant Systems, Inc. ("Conexant") products. These materials are provided by Conexant as a service to its customers and may be used for informational purposes only. Conexant assumes no responsibility for errors or omissions in these materials. Conexant may make changes to specifications and product descriptions at any time, without notice. Conexant makes no commitment to update the information and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to its specifications and product descriptions. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Conexant's Terms and Conditions of Sale for such products, Conexant assumes no liability whatsoever. THESE MATERIALS ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, RELATING TO SALE AND/OR USE OF CONEXANT PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, CONSEQUENTIAL OR INCIDENTAL DAMAGES, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. CONEXANT FURTHER DOES NOT WARRANT THE ACCURACY OR COMPLETENESS OF THE INFORMATION, TEXT, GRAPHICS OR OTHER ITEMS CONTAINED WITHIN THESE MATERIALS. CONEXANT SHALL NOT BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION, LOST REVENUES OR LOST PROFITS, WHICH MAY RESULT FROM THE USE OF THESE MATERIALS. Conexant products are not intended for use in medical, lifesaving or life sustaining applications. Conexant customers using or selling Conexant products for use in such applications do so at their own risk and agree to fully indemnify Conexant for any damages resulting from such improper use or sale. The following are trademarks of Conexant Systems, Inc.: ConexantTM, the Conexant C symbol, and "What's Next in Communications Technologies"TM. Product names or services listed in this publication are for identification purposes only, and may be trademarks of third parties. Third-party brands and names are the property of their respective owners. For additional disclaimer information, please consult Conexant's Legal Information posted at www.conexant.com, which is incorporated by reference. Reader Response: Conexant strives to produce quality documentation and welcomes your feedback. Please send comments and suggestions to tech.pubs@conexant.com. For technical questions, contact your local Conexant sales office or field applications engineer.
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Single-Chip FaxEngine and Integrated Analog Device * Microprocessor and Bus Interface Features (Cont'd) - Moveable external SRAM memory (CS0n) up to 1 MB - External ROM memory (covered by ROMCSn) up to 2 MB - Internal Interrupt controller * T.4/T.6 Compression and Decompression in Hardware - MH/MR - MMR - Alternating Compression/Decompression * Scanner/Printer Stepper Motor Control - Four outputs to external current drivers for the scanner stepper motor - Four outputs to external current drivers for the printer stepper motor - Programmable for acceleration/deceleration * Scanner and Video Control - CIS or CCD scanners supported - 6 programmable control signals - B4/A4 scanner support - 5 ms minimum line time - Embedded scanner Pipeline A/D - Line lengths up to 2616 pixels - Built-in Programmable Clamping, Analog Gain Control, and Sample/Hold circuits * Video Processing - Two modes of shading correction - Dark level correction - Gamma correction and MTF - 2-D Error Diffusion or Dithering - Multi-level B4-A4 fixed resolution conversion * Bi-Level Resolution Conversion - Programmable bi-level resolution conversion block provides expansion or reduction on the T.4/T.6 decompressed data or scan image data - Programmable image expansion up to 200% or reduction down to 60% - Vertical line ORing * Printer Interface Supports Thermal or Thermal Transfer Printers * Optional Plain Paper Inkjet Printer Support * Dedicated Interface to Support Operator Panel - 32 key direct support - 8 LED direct support - LCD support * Two Synchronous Interface (SSIF) * Synchronous/Asynchronous Interface (SASIF) * Programmable Tone Generator - Frequency and output levels are programmable
Single-Chip FaxEngine Product Family * General Purpose Inputs/Outputs - 38 GPIO and 32 GPO lines are provided * Embedded Modem DSP - Supports speeds up to 14400 bps and V.21 Channel 2 transmission/reception - Supports HDLC framing and detection - Supports DTMF generation/reception - Supports CID reception * External Integrated Analog (IA) Device * Optional DTAM Support - V24 24 minutes of voice storage per 4 Mbits of memory - ADPCM codec - PCM codec - Near-end echo cancellation * Optional Duplex Speakerphone - Speakerphone IA support - Acoustic Echo Cancellation - Line Echo Cancellation or Secondary Acoustic Echo Cancellation * * * * Real-Time Clock with Battery Backup Programmable Watchdog Timer EMI Reduction on Pads Stand-by and Sleep Modes to Reduce Power Consumption * On-chip or Off-chip Power Up/Down Detection * 3.3 V Operation * 3.3 V Compatible Interface * Compact Packages - CXD9450-xx: 176-pin TQFP - 20415-xx: 32-pin TQFP (not shown, refer to document number 100550) * Modular Firmware - Real-time multitasking environment - Fax transmit, receive, and copy - T.30 protocol - T.4/T.6 compression and decompression hardware support and control - Image expansion or reduction - Page memory functions - Call progress support - Caller ID support * Versatile Evaluation System - Provides demonstration, development and evaluation capabilities - MC24 software development tool kit
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Single-Chip FaxEngine and Integrated Analog Device
Digital Telephone Answering Machine (DTAM) (Optional)
The DTAM option provides digital answering machine functionality by providing a low bit rate voice codec that provides 24 minutes of voice storage per 4 Mbits of memory.
Hardware Description
Integrated Controller (SCC) The Controller contains an internal MC24 Processor with a 16-MB address space and dedicated circuitry optimized for facsimile image processing and monitoring and for thermal or thermal transfer printer support. The CPU provides fast instruction (up to 10 MHz clock speed) execution and memory efficient input/output bit manipulation. The CPU connects to other internal functions over an 8-bit data bus and 24-bit address bus and dedicated control lines. The 24-bit external address bus, 8-bit data bus, control, status, and decoded chip select signals support connection to external ROM, SRAM, DRAM, and FLASH memory. DRAM Controller The CXD9450 includes a DRAM controller with single and page mode access support which supports fast, normal, or slow refresh time. DRAM memory space is divided into two blocks, up to 4 MB each. A maximum of 8 MB of DRAM is supported. Each block has a programmable size and starting address. Refresh is performed automatically and is supported in Sleep and Stand-by modes. CAS and RAS signal support is provided for twoDRAM banks for both 4-bit and 8-bit organizations. Access speeds from 50 ns to 70 ns can be supported. The DRAM controller provides battery backup refresh using DRAM battery power. DMA Channels Six internal DMA channels support memory access for scanner, T.4/T.6, and resolution conversion. DMA Channel 2 can be reprogrammed for external access to thermal printing, thermal transfer, or plain paper inkjet printing. External RAM and ROM Moveable and programmable size external SRAM memory of up to 1 MB, DRAM memory of up to 8 MB, and ROM of up to 2 MB can be directly connected to the CXD9450. By using an external address decoder, the size of SRAM and/or ROM can be extended. The ROM stores all the program object code. SRAM is used by the Embedded CPU for shading RAM, image line buffer RAM, and ECM buffer.
Speakerphone (Optional)
The speakerphone option adds duplex digital speakerphone capability for hands-free applications. An additional Integrated Analog (IA) device is required for microphone and speaker interface to support duplex digital speakerphone operation.
Evaluation System (SCE100-ES)
The SCE100-ES Evaluation System provides demonstration, prototype development, and evaluation capabilities to facsimile machine developers using the device set. In addition, it provides a plug-on board for the operator panel, sockets for programmable parts, and connectors for an emulator. The operator panel on the Evaluation System allows for complete control and monitoring of functions. All necessary sockets for memory components are included. Jumper options and test points are provided throughout the SCE100-ES board. The Evaluation System is the most convenient environment for the developer needing to experiment with the various interfaces encountered in a fax machine. The Evaluation System, along with the hardware and application code, comprises a working facsimile machine.
Software Development Tools
The MC24 Software Development Kit (SDK) (McFERE2, 2500AD MC24 Macro Assembler, Linker, and Librarian) is available to support software/firmware development. This package can operate under the MS-DOS, Microsoft Windows 3.x, and Windows 9x Operating Systems. This versatility provides the developer with extensive tools for code modifications and debugging.
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Flash Memory Controller The CXD9450 includes a flash memory controller that supports NOR, NAND, and Serial NAND-type flash memory. The supported size of NOR-type memory is up to 2 MB and the supported size of NAND-type memory is unlimited. Stepper Motor Control Eight outputs are provided to external current drivers: four to the scanner motor and four to the printer motor. The stepping patterns are programmable and selectable line times are supported. A timeout circuit controls the power control of the motors. The printer or scanner motor outputs can be programmed as GPOs for applications using single motor or plain paper printers T.4/T.6 Compressor/Decompressor MH, MR, and MMR compression and decompression are provided in hardware. T.4 line lengths of up to 2616 pixels are supported. MMR and Alternating Compression/Decompression (ACD) on a line by line basis provide support for up to three independent compression and decompression processes. Bi-level Resolution Conversion One independent programmable bi-level 1D-resolution conversion block is provided to perform expansion or reduction on the T.4 decompressed data and scan image data. Image expansion can be programmed up to 200% and reduction down to 60%. Vertical line ORing and data output bit order reversal is also provided. Printer IF The Printer Interface provides a standard connection between the CXD9450 and a thermal printhead to support thermal printing or thermal transfer. The thermal printer interface consists of programmable data, latch, clock, and up to four strobe signals. Programmable timing supports traditional thermal printers, as well as the latchless split mode printers, and line lengths of up to 2048 pixels. Line times from 5 ms to 40 ms are supported. The CXD9450 includes a thermal ADC (TADC) function utilizing a D/A converter and a comparator to monitor the printhead temperature. External terminating resistors must be supplied; the values are determined by the specific printhead selected. As an option, plain paper inkjet printing can be supported.
Scanner and Video Control Six programmable control and timing signals support common CCD and CIS scanners. The video control function provides signals for controlling the scanner and for processing its video output. Four programmable control signals (START, CLK1, CLK1n, and CLK2) provide timing related to line and pixel timing. These are programmable with regard to start time, relative delay and pulse width. Two video control output signals (VIDCTL[1:0]) provide digital control for external signal pre-processing circuitry. These signals provide a per pixel period, or per line period, timing with programmable polarity control for each signal. Scanner Pipeline A/D Interface An internal 8-bit Pipeline A/D converter (PADC) is provided. The A/D reference input (+Vref) is externally fixed to VDD. Internal +Vref is available for control by the CPU. The internal +Vref covers the range from +2.25 V to +2.7 V. Scanner input signal supported with full scale is from 0.65 V P-P to 2.7 V P-P. Clamping, AGC, and Sample/Hold circuits are built-in. The PADC data output includes an overflow bit. The AGC gain is programmable from 0 to 12 dB, in 1-dB steps. Video Processing The CXD9450 supports two modes of shading correction for scanner data non-uniformity arising from uneven sensor output or uneven illumination. Correction is provided on either an 8-pixel group or is applied separately to each pixel. Dark level correction and gamma correction are also provided. Two-dimensional Error Diffusion/Dithering is performed on halftone images. The CXD9450 includes an 8 x 8 dither table, which is programmable and stored internally (8-bits per table entry). The table is arranged in a matrix of 8 rows by 8 columns. The video processing circuit provides mixedmode detection/processing and multi-level Resolution Conversion for the scanner multi-level data. The conversion ratio of the multi-level Resolution Conversion is fixed to B4-A4 conversion.
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Operator Panel Interface Operator Panel functions are supported by the operator output bus OPO[7:0], the operator input bus OPI [3:0], and two control outputs (LCDCS and LEDCTRL). The CXD9450 can directly interface to a 32-key keypad. External blocking diodes are required to isolate the keyboard strobe lines from the LED's, as the LED's and keyboard strobe signals use the same lines. Up to 8x15 keyboard array can be supported with external circuitry. Up to eight LEDs can be directly driven by the CXD9450. To prevent the dim LED glow that keyboard strobing would cause, an LED control signal is provided to disable the LED's during keyboard strobing. A 2-line LCD display module with 20 characters per line can be supported. Synchronous Serial Interface (SSIF) Two Synchronous only Serial Interfaces (SSIF) are built into the CXD9450, which allows it to communicate with external peripherals. Each SSIF provides separate signals for Data (SSTXD, SSRXD), Clock (SSCLK), and Status (SSSTAT). Each SSIF is a duplex, three-wire system. The SSIF may be configured to operate as either a master or a slave interface. The bit rate, clock polarity, clock phase, and data shifting order are programmable. Synchronous/Asynchronous Serial Interface (SASIF) One Synchronous/Asynchronous Serial Interface (SASIF) performs the following: * * Serial-parallel conversion of data received from a peripheral device Parallel-to-serial conversion of data for transmission to a peripheral device
Tone Generator The CXD9450 provides a programmable tone generator output. The frequency of the tone generator is programmable from 400 Hz to 4 KHz. By using a PWM programmable high frequency as a modulation frequency, the output level can be made programmable. Watchdog Timer The Programmable Watchdog Timer is intended to guard against firmware lockup on the part of either executivecontrolled background tasks or interrupt-driven tasks, and can only be enabled by a sequence of events under control of the Watchdog Control Logic. Once the Watchdog Timer has been enabled, it can not be disabled unless a system reset occurs. Reset and Power Control The RESETn I/O pin provides an internally generated reset output to external circuits, or it can accept an externally generated reset signal. This reset signal will not reset the RTC. Separate RTC battery power inputs are provided for battery-backup functions. A BATRSTn pin is provided, which resets the RTC circuits and other SCC circuits. Power Up/Down Control Power Up/Down detection is provided internally. The threshold voltages are: * Power Up detection level = 2.83 V to 2.95 V
An internally generated power down signal controls internal switching between primary and battery power. This control signal is also provided as an output on the PWRDWNn pin. An externally generated power down detector (optional) can be provided as an input on the PWRDWNn pin by setting the INTPWRDWNEn pin.
This interface consists of serial transmit data (SASTXD), serial receive data (SASRXD), and a serial clock (SASCLK). The SASIF includes a programmable bit rate generator for asynchronous and synchronous operations. The data shifting order, data bit number, and the SASCLK polarity are programmable. Real-Time Clock (RTC) The CXD9450 includes a battery backup real-time clock. The RTC will automatically maintain the proper date and time for 32 years. Leap year compensation is included. A 32.768 KHz or 65.536 KHz crystal is required by the RTC.
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Stand-by and Sleep Modes Two power saving modes are provided to reduce the power consumption. In Stand-by mode, the CPU is functional but the modem clock is turned off to save power. When this occurs, the modem may be activated by software under different conditions. In Sleep mode, the clock is cut off from both the modem and the CPU to increase the power savings. The DRAM refresh is still functional. The system can be activated by paper insertion, key pressing events, and telephone ring detection. Embedded Modem DSP The embedded modem DSP is a synchronous 9600 bps (14400 bps optional) half-duplex modem with error detection and DTMF generation/reception. It provides data transmission/reception from regular PSTN lines, PBX, or private lines. The modem can operate at any standard V.29 data speed up to 9600 bps as well as in V.21 and V.23 modes. The modem is designed for use in Group 3 facsimile machines, satisfies the requirements specified in ITU-T recommendations V.29, V.27 ter, V.21 Channel 2, and T.4, and meets the signaling requirements of T.30. It also performs HDLC framing according to T.30 at all speeds. Software and Firmware Support Features Available software and embedded firmware provides the following: * * * * * * * * * * * * Modem support for speeds up to 9600 bps (V.17 optional) ECM under conditional assembly DRAM memory support under conditional assembly MH, MR and MMR support Page memory receiving 5 ms minimum scan line time Conditional Error Diffusion or Dither table (8x8) support Dark Level Correction support Single motor support 32-key operator panel support Call progress support for Europe and US Monochrome inkjet print engine support
Pin Assignments and Signal Definitions
The CXD9450 176-pin TQFP signals are shown in Figure 2 and listed in Table 1.
Power Requirements
Power requirements are listed in Table 2.
Absolute Maximum Ratings
Absolute maximum ratings are listed in Table 3.
Crystal Specifications
The crystal specifications are listed in Table 4.
Package Dimensions
The 176-pin TQFP package dimensions are shown in Figure 3.
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176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133
D[4] D[5] D[6] D[7] VDDPLL WAITn/GPO[19] REGDMA/GPO[18] SM[0]/GPO[4] SM[1]/GPO[5] SM[2]/GPO[6] SM[3]/GPO[7] PM[0]/GPO[0] PM[1]/GPO[1] PM[2]/GPO[2] PM[3]/GPO[3] VDD SXOUT SXIN VSS CS1n/GPO[21] ROMCSn SYNC/GPO[20] WRn RDn DEBUGn TSTCLK VSSPLL SA1CLK SR1IO SR4OUT SR3IN/DSPIRQn IA1CLK IACLK/DSPCSn IARESET GPIO[37]/IRQ15n GPO[31]/SR3OUT GPIO[0]/SR4IN VDD GPIO[36] GPIO[35] GPIO[34] GPIO[33] GPIO[32] GPIO[31]
132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89
VSS D[3] D[2] D[1] D[0] A[23]/EYEXY A[22]/EYESYNC A[21]/EYECLK A[20] A[19] A[18] VDD A[17] A[16] A[15] A[14] VSS A[13] A[12] A[11] A[10] A[9] A[8] A[7] A[6] A[5] A[4] VDD A[3] A[2] A[1] A[0] GPIO[20]/ALTTONE NC NC NC NC NC GPIO[19]/RDY/SEROUT GPIO[11]/BE/SERINP VSS PCLK/DMAACK PDAT PLAT
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
Single-Chip FaxEngine (CXD9450)
GPIO[30] GPIO[29] GPO[30] GPO[29] GPO[28] GPO[27] GPO[26] GPIO[28] GPIO[27] GPIO[26] GPIO[25] VSS TONE VDD START CLK1 CLK1n/GPO[25] CLK2/GPO[24] FCSn[1]/VIDCTL[0]/GPO[23] FCSn[2]/VIDCTL[1]/GPO[22] GPIO[8]/FWRn GPIO[9]/FRDn GPIO[1]/SASTXD GPIO[2]/SASRXD GPIO[3]/SASCLK GPIO[18]/IRQ[9]n VSS RESETn OPI[0]/GPIO[21]/SSRXD1 OPI[1]/GPIO[22]/SSSTAT1 OPI[2]/GPIO[23]/SSCLK1 OPI[3]/GPIO[24] OPO[0]/GPO[8]/SMPWRCTRL OPO[1]/GPO[9]/PMPWRCTRL OPO[2]/GPO[10]/RINGER OPO[3]/GPO[11] OPO[4]/GPO[12]/SSTXD1 OPO[5]/GPO[13] OPO[6]/GPO[14] OPO[7]/GPO[15] THADI VDD IVREFp IVREFn
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STRB[3] STRB[2] STRB[1] STRB[0] STRBPOL/DMAREQ VDD GPIO[17] GPIO[16]/IRQ[8] GPIO[15]/CS[5]n GPIO[14]/CS[4]n GPIO[13]/CS[3]n GPIO[12]/CS[2]n GPIO[4]/CPCIN VSS LEDCTRL/GPO[16] NC LCDCS/GPO[17] GPIO[7]/SSRXD2 GPIO[6]/SSTXD2 GPIO[5]/SSCLK2 GPIO[10]/SSSTAT2 VDRAM RASn CAS[1]n CAS[0]n DWRn VBAT XIN XOUT WRPROTn CS0n TEST[1] TEST[0] BATRSTn INTPWRDWNEn PWRDWNn NC ADGA VREFn/CLREF VIN ADGA ADVA ADXG VREFp
45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
222DS - SCE100 -176 TQFP F2
Figure 2. CXD9450 176-Pin TQFP Signals
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Table 1. CXD9450 176-Pin TQFP Assignments Pin
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 VSS D[3] D[2] D[1] D[0] A[23]/EYEXY A[22]/EYESYNC A[21]/EYECLK A[20] A[19] A[18] VDD A[17] A[16] A[15] A[14] VSS A[13] A[12] A[11] A[10] A[9] A[8] A[7] A[6] A[5] A[4] VDD A[3] A[2] A[1] A[0] GPIO[20]/ALTTONE NC NC NC NC NC GPIO[19]/RDY/SEROUT GPIO[11]/BE/SERINP VSS PCLK/DMAACK PDAT PLAT
Signal Label
--
I/O
Input Type
-- Tu Tu Tu Tu Tu Tu Tu Tu Tu Tu -- Tu Tu Tu Tu -- Tu Tu Tu Tu Tu Tu Tu Tu Tu Tu -- Tu Tu Tu Tu Hu -- -- -- -- -- Hu Hu -- -- -- -- --
Output Type
13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs -- 13Xs 13Xs 13Xs 13Xs -- 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs -- 13Xs 13Xs 13Xs 13Xs 13Xs -- -- -- -- -- 13Xs 13Xs -- 3XC 2XC 3XC
Pin Description
VSSi CPU Data Bus CPU Data Bus CPU Data Bus CPU Data Bus CPU Address Bus CPU Address Bus CPU Address Bus CPU Address Bus CPU Address Bus CPU Address Bus VDDo CPU Address Bus CPU Address Bus CPU Address Bus CPU Address Bus VSSo CPU Address Bus CPU Address Bus CPU Address Bus CPU Address Bus CPU Address Bus CPU Address Bus CPU Address Bus CPU Address Bus CPU Address Bus CPU Address Bus VDDi CPU Address Bus CPU Address Bus CPU Address Bus CPU Address Bus -- Reserved Reserved Reserved Reserved Reserved -- -- VSSi -- -- --
I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O -- I/O I/O I/O I/O -- I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O -- I/O I/O I/O I/O I/O -- -- -- -- -- I/O I/O -- O O O
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Table 1. CXD9450 176-Pin TQFP Assignments (Cont'd) Pin
45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
Signal Label
STRB[3] STRB[2] STRB[1] STRB[0] STRBPOL/DMAREQ VDD GPIO[17] GPIO[16]/IRQ[8] GPIO[15]/CS[5]n GPIO[14]/CS[4]n GPIO[13]/CS[3]n GPIO[12]/CS[2]n GPIO[4]/CPCIN VSS LEDCTRL/GPO[16] NC LCDCS/GPO[17] GPIO[7]/SSRXD2 GPIO[6]/SSTXD2 GPIO[5]/SSCLK2 GPIO[10]/SSSTAT2 VDRAM RASn CAS[1]n CAS[0]n DWRn VBAT XIN XOUT WRPROTn CS0n TEST[1] TEST[0] BATRSTn INTPWRDWNEn PWRDWNn NC ADGA VREFn/CLREF VIN ADGA ADVA ADXG VREFp O O O O I --
I/O
Input Type
-- -- -- -- H -- Hu Hu Hu Hu Hu Hu Hu -- -- -- -- Hu Hu Hu Hu -- -- -- -- -- -- Osc1 -- -- -- Hd Hd H H H -- VADG VRVA VADG VADV VXG VR
Output Type
1XC 1XC 1XC 1XC -- -- 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs -- 4XC -- 1XC 13Xs 13Xs 13Xs 13Xs -- 13Xs 13Xs 13Xs 13Xs -- -- Osc1 1XC 13Xs -- -- -- -- 13Xs -- -- -- -- -- -- -- -- -- -- -- -- --
Pin Description
VDDo -- -- -- -- -- -- -- VSSo -- Reserved -- -- -- -- -- VDDio -- -- -- -- VDDio -- -- -- -- -- -- -- -- -- Reserved PADC PADC PADC PADC PADC PADC PADC
I/O I/O I/O I/O I/O I/O I/O -- O -- O I/O I/O I/O I/O -- O O O O -- I O O O I I I I I/O -- -- I I -- -- -- I
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Single-Chip FaxEngine Product Family
Table 1. CXD9450 176-Pin TQFP Assignments (Cont'd) Pin
89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 IVREFn IVREFp VDD THADI OPO[7]/GPO[15] OPO[6]/GPO[14] OPO[5]/GPO[13] OPO[4]/GPO[12]/SSTXD1 OPO[3]/GPO[11] OPO[2]/GPO[10]/RINGER
Signal Label
O O -- I O O O O O
I/O
Input Type
VRVR+ -- Analog -- -- -- -- -- -- -- -- Hu Hu Hu Hu Hu -- Hu Hu Hu Hu Hu Hu -- -- -- -- -- -- -- -- -- Hu Hu Hu Hu -- -- -- -- -- Hu Hu -- -- -- --
Output Type
Pin Description
PADC PADC VDDi TADC -- -- -- -- -- -- -- -- -- -- -- -- -- VSSo -- -- -- -- -- -- -- -- -- -- -- -- VDDo -- VSSi -- -- -- -- -- -- -- -- -- -- --
13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 2XC -- 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 2XC 2XC -- Analog -- 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs
OZ
OPO[1]/GPO[9]/PMPWRCTRL O OPO[0]/GPO[8]/SMPWRCTRL O OPI[3]/GPIO[24] OPI[2]/GPIO[23]/SSCLK1 OPI[1]/GPIO[22]/SSSTAT1 OPI[0]/GPIO[21]/SSRXD1 RESETn VSS GPIO[18]/IRQ[9]n GPIO[3]/SASCLK GPIO[2]/SASRXD GPIO[1]/SASTXD GPIO[9]/FRDn GPIO[8]/FWRn FCSn[2]/VIDCTL[1]/GPO[22] FCSn[1]/VIDCTL[0]/GPO[23] CLK2/GPO[24] CLK1n/GPO[25] CLK1 START VDD TONE VSS GPIO[25] GPIO[26] GPIO[27] GPIO[28] GPO[26] GPO[27] GPO[28] GPO[29] GPO[30] GPIO[29] GPIO[30] I/O I/O I/O I/O I/O -- I/O I/O I/O I/O I/O I/O O O O O O O -- O -- I/O I/O I/O I/O O O O O O I/O I/O
100544C
Conexant
11
Single-Chip FaxEngine Product Family
Single-Chip FaxEngine and Integrated Analog Device
Table 1. CXD9450 176-Pin TQFP Assignments (Cont'd) Pin
133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176
Signal Label
GPIO[31] GPIO[32] GPIO[33] GPIO[34] GPIO[35] GPIO[36] VDD GPIO[0]/SR4IN GPO[31]/SR3OUT GPIO[37]/IRQ15n IARESET IACLK/DSPCSn IA1CLK SR3IN/DSPIRQn SR4OUT SR1IO SA1CLK VSSPLL TSTCLK DEBUGn RDn WRn SYNC/GPO[20] ROMCSn CS1n/GPO[21] VSS SXIN SXOUT VDD PM[3]/GPO[3] PM[2]/GPO[2] PM[1]/GPO[1] PM[0]/GPO[0] SM[3]/GPO[7] SM[2]/GPO[6] SM[1]/GPO[5] SM[0]/GPO[4] REGDMA/GPO[18] WAITn/GPO[19] VDDPLL D[7] D[6] D[5] D[4]
I/O
I/O I/O I/O I/O I/O I/O -- I/O O I O O I I O O I -- O I O O O O O -- O O -- O O O O O O O O O O -- I/O I/O I/O I/O
Input Type
Hu Hu Hu Hu Hu Hu -- Hu -- Hu -- -- H H -- -- H -- -- Hu -- -- -- -- -- -- Osc0 -- -- -- -- -- -- -- -- -- -- -- -- -- Tu Tu Tu Tu
Output Type
13Xs 13Xs 13Xs 13Xs 13Xs 13Xs -- 13Xs 13Xs 13Xs 13Xs 13Xs -- -- 13Xs 13Xs -- -- 13Xs -- 13Xs 13Xs 13Xs 13Xs 13Xs -- -- Osc0 -- 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs 13Xs -- 13Xs 13Xs 13Xs 13Xs -- -- -- -- -- -- VDDi -- -- --
Pin Description
DSP to EXTIA POR DSP to EXTIA MCLK/Ext. Modem CSn DSP from EXTIA ICLK DSP from primary EXTIA SOUT/EXT. Modem IRQn DSP to primary EXTIA SIN DSP to EXTIA CTRL1 DSP from EXTIA FSYNC VSSi for PLL -- -- -- -- -- -- -- VSSo -- -- VDDo -- -- -- -- -- -- -- -- -- -- VDDi for PLL -- -- -- --
12
Conexant
1100544C
Single-Chip FaxEngine and Integrated Analog Device
Single-Chip FaxEngine Product Family
Table 1. CXD9450 176-Pin TQFP Assignments (Cont'd)
Notes: I/O Type Combinations
u d s h t 13X 1XC 2XC 3XC 4XC Osc0 Osc1 = Pull up = Pull down = Slew rate control = hysteresis = non-hysteresis input = Programmable drive 1X or 3X = 3 V CMOS output 1X drive = 3 V CMOS output 2X drive = 3 V CMOS output 3X drive = 3 V CMOS output 4X drive = System Oscillator pad = RTC Oscillator pad
Where: 13X s | |____ Slew Rate Control |________ 1X or 3X drive
Table 2. CXD9450 Current and Power Requirements Power Source Voltage
1
Typical Current 3 @25C
130 mA 60 A
Maximum Current 3 @ 0C
140 mA 64 A
Typical Power 3 @25C
430 mW 180 W
Maximum Power 3 @ 0C
500 mW 205 W
Primary Power Battery Power and RTC Notes: 1. 2. 3.
2
+3.3 V 0.3 V +2.7 V to VDD
Input voltage ripples =0.1 volts peak-to-peak. The amplitude of any frequency between 20 KHz and 150 KHz must be less than 500 microvolts peak. Real-Time Clock (RTC) battery power measurements made with a 32.768 KHz crystal oscillator. Normal mode
Table 3. CXD9450 Absolute Maximum Ratings Parameter
Supply Voltage Input Voltage Operating Temperature Range Storage Temperature Range Analog Inputs Voltage Applied to Outputs in High Impedance (Off) State DC Input Clamp Current DC Output Clamp Current Static Discharge Voltage (25C) Latch-up Current (25C)
Symbol
VDD VIN TA TSTG VIN VHZ IIK IOK VESD ITRIG
Limits
-0.5 to + 4.6 -0.5 to + 4.6 -0 to +70 -55 to +125 -0.3 to (+3.3V +0.3V) -0.5 to + 4.6 20 20 2500 200 V V C C V V mA mA V mA
Units
100544C
Conexant
13
Single-Chip FaxEngine Product Family
Single-Chip FaxEngine and Integrated Analog Device
Table 4. Crystal Specifications - 32.256 MHz Functional Mode Characteristic
Conexant Part No. Electrical Frequency Frequency Tolerance Frequency Stability vs. Temperature vs. Aging Oscillation Mode Calibration Mode Load Capacitance, CL Shunt Capacitance, CO Series Resistance, R1 Drive Level 35 ppm (-20C to 70C) 15 ppm/5 years Fundamental Parallel resonant 18 pF nom. 7 pF max. 35 max. @100 nW drive level 100 W correlation; 500 W max. Operating Temperature Storage Temperature Mechanical Holder Type Third Lead Notes: 1. Characteristics @ 25C unless otherwise noted. 2. Suggested supplier: ILSI America 5458 Louie Lane Reno, NV 89511 USA (702) 851-8880 SMT Required Through Hole Required 0C to 70C -40C to 85C 35 ppm (-20C to 70C) 15 ppm/5 years Third Overtone Parallel resonant 18 pF nom. 7 pF max. 40 max. @100 nW drive level 100 W correlation; 1.0 mW max. -20C to 70C -40C to 85C 32.256 MHz nominal 50 ppm (CL = 18 pF) 32.256 MHz nominal 50 ppm (CL = 18 pF)
HC49U-32.256-FL
HC49U-32.256-L
14
Conexant
1100544C
Single-Chip FaxEngine and Integrated Analog Device
Single-Chip FaxEngine Product Family
Figure 3. 176-Pin TQFP Package Dimensions
100544C
Conexant
15
0.0 Sales Offices
Further Information literature@conexant.com (800) 854-8099 (North America) (949) 483-6996 (International) Printed in USA World Headquarters Conexant Systems, Inc. 4311 Jamboree Road Newport Beach, CA 92660-3007 Phone: (949) 483-4600 Fax 1: (949) 483-4078 Fax 2: (949) 483-4391 Americas U.S. Northwest/ Pacific Northwest - Santa Clara Phone: (408) 249-9696 Fax: (408) 249-7113 U.S. Southwest - Los Angeles Phone: (805) 376-0559 Fax: (805) 376-8180 U.S. Southwest - Orange County Phone: (949) 483-9119 Fax: (949) 483-9090 U.S. Southwest - San Diego Phone: (858) 713-3374 Fax: (858) 713-4001 U.S. North Central - Illinois Phone: (630) 773-3454 Fax: (630) 773-3907 U.S. South Central - Texas Phone: (972) 733-0723 Fax: (972) 407-0639 U.S. Northeast - Massachusetts Phone: (978) 367-3200 Fax: (978) 256-6868 U.S. Southeast - North Carolina Phone: (919) 858-9110 Fax: (919) 858-8669 U.S. Southeast - Florida/ South America Phone: (727) 799-8406 Fax: (727) 799-8306 U.S. Mid-Atlantic - Pennsylvania Phone: (215) 244-6784 Fax: (215) 244-9292 Canada - Ontario Phone: (613) 271-2358 Fax: (613) 271-2359 Europe Europe Central - Germany Phone: +49 89 829-1320 Fax: +49 89 834-2734
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